Semiconductor IP Articles Archive - Page 5 of 228

SPAD: Specialized Prefill and Decode Hardware for Disaggregated LLM Inference

By Hengrui Zhang, Princeton University

October 23, 2025

DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining

By Muhammad Hassan, Tallinn University of Technology

October 22, 2025

ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors

By Nuntipat Narkthong, Northeastern University

October 21, 2025

Practical Considerations of LDPC Decoder Design in Communications Systems

By Wasiela

October 15, 2025

A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems

By Thomas Benz, ETH Zurich

October 15, 2025

A logically correct SoC design isn’t an optimized design

By Rick Bye, Arteris

October 15, 2025

AI in VLSI Physical Design: Opportunities and Challenges

By Japesh Kumar, Qualcomm

October 14, 2025

cMPI: Using CXL Memory Sharing for MPI One-Sided and Two-Sided Inter-Node Communications

By Xi Wang, University of California

October 8, 2025

From Principles to Practice: A Systematic Study of LLM Serving on Multi-core NPUs

By Tianhao Zhu, Shanghai Jiao Tong University

October 8, 2025

Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage

By Junius Pun, Nanyang Technological University

October 6, 2025

A Resource-Driven Approach for Implementing CNNs on FPGAs Using Adaptive IPs

By Philippe Magalhães, Hubert Curien Laboratory - Université Jean Monnet

October 6, 2025

Runtime Energy Monitoring for RISC-V Soft-Cores

By Alberto Scionti, Links Foundation

October 2, 2025

Fault Injection in On-Chip Interconnects: A Comparative Study of Wishbone, AXI-Lite, and AXI

By Hongwei Zhao, Université Bretagne Sud

September 30, 2025

eFPGA – Hidden Engine of Tomorrow’s High-Frequency Trading Systems

By Menta

September 24, 2025

aTENNuate: Optimized Real-time Speech Enhancement with Deep SSMs on RawAudio

By Yan Ru Pei, BrainChip

September 18, 2025

Combating the Memory Walls: Optimization Pathways for Long-Context Agentic LLM Inference

By Haoran Wu, University of Cambridge

September 16, 2025

Hardware Acceleration of Kolmogorov-Arnold Network (KAN) in Large-Scale Systems

By Wei-Hsing Huang, Georgia Institute of Technology

September 16, 2025

CRADLE: Conversational RTL Design Space Exploration with LLM-based Multi-Agent Systems

By Lukas Krupp, RPTU University of Kaiserslautern-Landau

September 13, 2025

On the Thermal Vulnerability of 3D-Stacked High-Bandwidth Memory Architectures

By Mehdi Elahi, North Carolina A&T State University

September 10, 2025

OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs

By Rishov Sarkar, Georgia Institute of Technology

September 5, 2025